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Journal Article Demonstration of Reconfigurable FET and Logic Gates on Epitaxial Lateral Overgrowth Silicon Platform
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Authors
Seong Hyun Lee, Sang Hoon Kim, Sungyeop Jung, Jeong Woo Park, Tae Moon Roh, Wangjoo Lee, Dongwoo Suh
Issue Date
2022-10
Citation
IEEE Transactions on Electron Devices, v.69, no.10, pp.5443-5449
ISSN
0018-9383
Publisher
IEEE
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1109/TED.2022.3200638
Abstract
We developed a novel technique, selective epitaxial lateral overgrowth (ELO), to fabricate a local but sufficiently large silicon-on-insulator (SOI) platform on conventional silicon wafers. Based on high-level crystallinity of the local SOI, we implemented reconfigurable FETs with three gates. These FETs demonstrate n-and p-type behavior depending on the applied bias. Not only the reconfigurable FETs but also their logic gates (inverter and NAND) delivered sound performance. Using a compact model based on the surface potential of the channel, we derived the key parameters of the proposed reconfigurable FET and used the model to explain the peculiarities in its working behavior. Owing to the unique advantages of a local SOI, reconfigurable FETs can be seamlessly incorporated into a silicon platform as a building block for CMOS-SOI hybrid electronics.
KSP Keywords
AND logic gates, Building block, Epitaxial Lateral Overgrowth, Hybrid electronics, Key parameters, Novel technique, Silicon On Insulator(SOI), Silicon wafer, Sound performance, Surface Potential, applied bias