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Conference Paper 76‐2: Scalable Real‐time Holography Processor Architecture
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Authors
Wonok Kwon, Sanghoon Cheon, Joongki Park
Issue Date
2023-05
Citation
Society for Information Display (SID) International Symposium 2023, pp.1076-1079
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1002/sdtp.16757
Abstract
In this paper, we present a fast and efficient scalable holographic video processor using a layer‐based method, which employs a modified inverse Fresnel transform. To verify the performance of the proposed architecture, we design a single‐layered holography core using a fixed‐point model and test its performance on a field‐programmable gate array. The implemented real‐time hologram processor features a 1k × 1k size fast Fourier transform and a 30 frames/sec conversion rate in 4K color spatial light modulators after applying 2× linear interpolation. All real‐time images on computer screens, such as YouTube and movies, are converted into holograms within 22 ms.
KSP Keywords
Fast Fourier transform, Field Programmable Gate Arrays(FPGA), Fresnel Transform, Point model, Processor architecture, Spatial light modulator(SLM), Video processor, conversion rate, linear interpolation