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Conference Paper Developing an Ultra-low Power RISC-V Processor for Anomaly Detection
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Authors
Jina Park, Eunjin Choi, Kyungwon Lee, Jae-Jin Lee, Kyuseung Han, Woojoo Lee
Issue Date
2023-04
Citation
Design, Automation & Test in Europe Conference (DATE) 2023, pp.1-2
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.23919/DATE56975.2023.10137003
Project Code
23HS4200, Distributed on-chip memory-operator convergence PIM semiconductor technology development for edge device, Jae-Jin Lee
Abstract
This paper aims to develop an ultra-low power processor for wearable devices for anomaly detection. To this end, this paper proposes a processor architecture that divides the architecture into a part for general applications running on wearable devices (day part) and a part that performs anomaly detection by analyzing sensor data (night parts), and each part operates completely independently. This day-night architecture allows the day part, which contains the power-hungry mainCPU and system interconnect, to be turned off most of the time except for intermittent work, and the night part, which consists only of the sub-CPU and minimal IPs, can run all the time with low power. By developing a processor based on the proposed processor architecture, the design verification of the proposed technology and the superiority of power saving are demonstrated.
KSP Keywords
Design Verification, Low Power Processor, Processor architecture, RISC-V, Ultralow power(ULP), Wearable device, anomaly detection, power saving, sensor data