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Deep-Submicron Channel Length Oxide Semiconductor Thin-Film Transistors Enabled by Self-Aligned Nanogap Lithography
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- Authors
- Chihun Sung, Jeho Na, Sooji Nam, Sung Haeng Cho
- Issue Date
- 2024-06
- Citation
- IEEE Electron Device Letters, v.45, no.6, pp.1020-1023
- ISSN
- 0741-3106
- Publisher
- Institute of Electrical and Electronics Engineers
- Language
- English
- Type
- Journal Article
- Abstract
- This study presents the fabrication of oxide semiconductor thin-film transistors (TFTs) with a channel length of 60 nm, which is made possible through self-aligned nanogap lithography. The TFTs feature a 6-nm-thick Al-doped InZnSnO semiconductor layer and a 10-nm-thick Al2O3 gate dielectric, arranged in a bottom gate top contact configuration. Key performance metrics include a subthreshold swing of 92 mV/dec, an on/off current ratio exceeding 1010 , and a turn-on voltage of -0.91 V. The driving current at a gate bias of 2 V and a drain bias of 1.5 V reached 290μA/μm . Additionally, the study observed a drain-induced barrier lowering of approximately 250 mV/V for the TFTs examined in this research.
- KSP Keywords
- Al-doped, Bottom gate, Channel Length, Driving current, Key Performance, Thin-Film Transistor(TFT), Top contact configuration, Turn-on voltage, drain bias, drain-induced barrier lowering(DIBL), gate bias