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Journal Article Compact Dual-Core Drive Stage using Three-winding Transformer for CMOS Broadband Power Amplifier
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Authors
Joon-Hyung Kim, Jeong-Taek Son, Jae-Hyeok Song, Jae-Eun Lee, Min-Seok Baek, Jeong-Taek Lim, Han-Woong Choi, Seong-Mo Moon, Dongpil Chang, Choul-Young Kim
Issue Date
2024-06
Citation
IEEE Microwave and Wireless Components Letters, v.34, no.6, pp.773-776
ISSN
1531-1309
Publisher
Institute of Electrical and Electronics Engineers
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1109/LMWT.2024.3396491
Abstract
We present a novel broadband power amplifier (PA) architecture designed to achieve both high output power and a compact chip size in CMOS. This architecture features a dual-core drive stage and a compact vertical three-winding transformer (TF). Implemented using a 65-nm bulk CMOS process, precise measurements validate its feasibility. The measured 3-dB bandwidth (BW 3 dB ) of the proposed PA is 8 GHz (7–15 GHz), with a fractional BW (FBW) of 73%. In the 10–15-GHz range, it demonstrates 19–22-dB gain, 22–23.2-dBm PSAT , and 30%–41.5% PAE (all under the same bias conditions). During testing at 10–15 GHz (FBW: 40%) with a 1-CC 64-QAM OFDM signal (all under the same bias conditions), the PA demonstrates an average output power of 15.6–17.1 dBm and an average efficiency of 11.8%–18.4% at -25-dB error vector magnitude (EVM)rms.
KSP Keywords
15 GHz, 3-dB bandwidth, 64-QAM, Average efficiency, Bulk CMOS, CMOS Process, Dual-core, GHz range, High output power, OFDM signal, Precise measurement