상세정보
학술대회
High Available System Control Network in the Packet Transport System
- 발행일
- 201007
- 출처
- International Conference on Optical Internet (COIN) 2010, pp.1-3
- 협약과제
- 09MR4700, 패킷-광 통합 스위치 기술 개발, 유태환
- 초록
- This paper is about design and buildup of multiprocessor interconnects in the packet transport system. To keep pace with expansion and growth of internet and data communication, constant enhancement and upgrade of packet transport system is required. As network adopts new services like IPTV, VoIP, and VLAN, processing power of packet transport system should be easily and dynamically added to the system for supporting highly compute-power requiring jobs. The processing power of system depends on the number of processors, the clock speed of each processor, efficiency of operation system in data centric processing, proper distribution of system works, and robust and high bandwidth interconnects (system control network) among processors. This paper suggested several methods for the system control networking in the packet transport system and reviewed each method in the view of internal and external expansion of system control network, loop elimination, and redundancy support.
- KSP 제안 키워드
- Clock speed, Control network, Data-centric, Internal and external, Packet transport, data communication, high-bandwidth, number of processors, operation system, processing power, system control