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Conference Paper Physical Qubits Estimation for Quantum S-box
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Authors
You-Seok Lee, Jongheon Lee, Boheung Chung, Yousung Kang
Issue Date
2024-10
Citation
International Conference on Information and Communication Technology Convergence (ICTC) 2024, pp.1369-1370
Publisher
IEEE
Language
English
Type
Conference Paper
DOI
https://dx.doi.org/10.1109/ICTC62082.2024.10826924
Abstract
We estimate the physical qubits required to implement S-boxes of various sizes on a real quantum processor based on target error rates. Quantum circuits are designed to use fewer quantum resources considering the feasibility of implementation. Qubits are one of the main quantum resources and inherently involve errors. In order to obtain accurate computational results, qubit errors should be minimized. To reduce qubit errors, a large number of physical qubits are required, which is inversely proportional to the target error rate. In this paper, we estimate the number of physical qubits required to implement quantum S-boxes of various sizes. Based on the analysis results, we propose a new metric to optimize the design of quantum circuits.
KSP Keywords
Quantum circuit, S-box, computational results, error rate