BROWSE
Detail
Journal Article
SNN eXpress: Streamlining Low‐Power AI‐SoC Development With Unsigned Weight Accumulation Spiking Neural Network
- Authors
- Hyeonguk Jang, Kyuseung Han, Kwang-Il Oh, Sukho Lee, Jae-Jin Lee, Woojoo Lee
- Issue Date
- 2024-10
- Citation
- ETRI Journal, v.46, no.5, pp.829-838
- ISSN
- 1225-6463
- Publisher
- 한국전자통신연구원
- Language
- English
- Type
- Journal Article
- Abstract
- SoCs with analog-circuit-based unsigned weight-accumulating spiking neural networks (UWA-SNNs) are a highly promising solution for achieving low-power AI-SoCs. This paper addresses the challenges that must be overcome to realize the potential of UWA-SNNs in low-power AI-SoCs: (i) the absence of UWA-SNN learning methods and the lack of an environment for developing applications based on trained SNN models and (ii) the inherent issue of testing and validating applications on the system being nearly impractical until the final chip is fabricated owing to the mixed-signal circuit implementation of UWA-SNN-based SoCs. This paper argues that, by integrating the proposed solutions, the development of an EDA tool that enables the easy and rapid development of UWA-SNN-based SoCs is feasible, and demonstrates this through the development of the SNN eXpress (SNX) tool. The developed SNX automates the generation of RTL code, FPGA prototypes, and a software development kit tailored for UWA-SNN-based application development. Comprehensive details of SNX development and the performance evaluation and verification results of two AI-SoCs developed using SNX are also presented.
- KSP Keywords
- Circuit-based, Learning methods, Performance evaluation, Rapid development, Software development kit, Weight accumulation, application development, circuit implementation, eda tool, low power, mixed-signal circuit
This work is distributed under the term of Korea Open Government License (KOGL)
(Type 4: : Type 1 + Commercial Use Prohibition+Change Prohibition)
(Type 4: : Type 1 + Commercial Use Prohibition+Change Prohibition)
