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Journal Article A Precise and Low Power Analog Spiking Neural Network Exploiting Pre-Charged Current Mode Synapses and Coarse-Fine Neuron Comparators
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Authors
Kyu-Dong Hwang, Kwang-Il Oh, Jae-Jin Lee, Min-Woo Kim, Byung-Do Yang
Issue Date
2025-06
Citation
Electronics Letters, v.61, no.1, pp.1-4
ISSN
0013-5194
Publisher
John Wiley & Sons
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1049/ell2.70318
Abstract
This paper proposed a precise and low power analog spiking neural network (SNN). It decreases the membrane current error and improves linearity of SNN with the proposed pre-charged current-mode synapses. Also, it reduces the neuron power consumption by replacing a static amplifier with an event-driven coarse-fine comparator. The proposed analogue SNN chip was fabricated using a 65 nm process. Its area is 2.4 × 2.77 mm2 with 1024 × 256 synapses. The membrane capacitor is 4 pF. The pre-charged synapse reduces the membrane current error by 15.38%. The event-driven coarse-fine comparator saves 49% neuron power.
KSP Keywords
Coarse-fine, Current-mode(CM), Event-driven, Membrane Capacitor, Power Consumption, current error, low power analog, neural network(NN), spiking neural networks
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CC BY