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구분 SCI
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학술대회 Modeling and Measurement of Board-level ESD from Power/Ground Plane Charged by Low-voltage for Investigation of Decoupling Capacitor Effects in Printed Circuit Boards (PCBs)
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저자
성하진, 김명회, 이우진, 윤창욱, 구경철, 권종화, 김정호
발행일
201012
출처
Electronics Packaging Technology Conference (EPTC) 2010, pp.773-776
DOI
https://dx.doi.org/10.1109/EPTC.2010.5702753
협약과제
10MR3800, 전자파 기반 진단 및 방호기술 연구, 전순익
초록
This paper presents modeling and measurement of low voltage electrostatic discharge (ESD) from power/ground (P/G) planes. The P/G plane in charging part and a line in discharging part are modeled as equivalent circuits for analysis of ESD current waveform. The test vehicles are fabricated on multilayer printed circuit boards (PCBs). The ESD modeling of low voltage charged power/ground plane is verified through measurements. We also investigate the effects of decoupling capacitors on ESD of P/G plane. ©2010 IEEE.
KSP 제안 키워드
Current waveform, ESD modeling, Electro Static Discharge(ESD), Equivalent Circuit, Modeling and measurement, decoupling capacitor, ground planes(GP), low voltage, printed circuit board(PCB)