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Journal Article AI 워크로드를 위한 고성능 컴퓨팅(HPC) 프로세서 기술 발전 동향
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Authors
박유미, 기문철, 한우종
Issue Date
2026-02
Citation
전자통신동향분석, v.41, no.1, pp.69-81
ISSN
1225-6455
Publisher
한국전자통신연구원
Language
Korean
Type
Journal Article
DOI
https://dx.doi.org/10.22648/ETRI.2025.J.410107
Abstract
High performance computing (HPC), once reserved for large-scale scientific research and industrial simulations, has rapidly evolved because of the massive computational demands of modern artificial intelligence (AI) workloads. This paper examines the architectural evolution of HPC processors to maximize the processing efficiency of these AI-driven tasks, focusing on advances in architecture, packaging, interconnect, and memory interface technologies. We conducted a comprehensive analysis of the latest HPC processors from Intel, AMD, and NVIDIA, highlighting their structural characteristics and interface innovations. The analysis reveals how chiplet-based packaging, high-bandwidth memory integration, and high-speed interconnects are being implemented in modern HPC processor designs. Based on these findings, this paper presents the emerging directions of next-generation HPC infrastructure architectures optimized for AI workloads.
Keyword
HPC 프로세서, 고대역폭 메모리, 고성능컴퓨팅 프로세서, 고속 인터커넥트
KSP Keywords
Architectural Evolution, High-performance computing(HPC), High-speed interconnects, Interface technology, Memory interface, Next-generation, Structural characteristic, artificial intelligence, comprehensive analysis, high bandwidth memory(HBM), large-scale
This work is distributed under the term of Korea Open Government License (KOGL)
(Type 4: : Type 1 + Commercial Use Prohibition+Change Prohibition)
Type 4: