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Conference Paper
교차 결합 커패시터 기반 대역폭 향상 이중 리사이클링 폴디드 캐스코드 증폭기
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- Authors
- 유시은, 문성모, 박창주
- Issue Date
- 2026-06
- Citation
- 대한전자공학회 학술 대회 (하계) 2026, pp.1-4
- Publisher
- 대한전자공학회
- Language
- English
- Type
- Conference Paper
- Abstract
- This paper presents an operational transconductance amplifier (OTA) that overcomes the fundamental trade-off between power consumption, bandwidth, and stability. The proposed OTA boosts effective transconductance by using a double-recycling folded cascode (DRFC) topology and cross-coupled capacitors without increasing the DC power budget. Three amplifiers — a conventional folded-cascode (FC), a DRFC, and the proposed amplifier — were designed in a 65-nm CMOS process under the same supply voltage and load conditions. Simulation results show unity-gain frequencies (UGF) of 44.58 MHz, 296.7 MHz, and 306.7 MHz, respectively, under similar power consumption. The proposed amplifier also improves the phase margin from 57.95 deg in the DRFC case to 58.47 deg, confirming simultaneous bandwidth enhancement and stability improvement.
- KSP Keywords
- Bandwidth Enhancement, CMOS Process, Dc power, Load conditions, Operational transconductance amplifier(OTA), Phase margin, Power Consumption, Recycling Folded Cascode(RFC), Supply voltage, Trade-off, cross-coupled