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Conference Paper
Thermally Robust 1-µm-Channel Oxide TFTs Enabled by Selective Incorporation of a Highly Conductive Oxide Layer
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- Authors
- Ji Hun Choi, Jae-Eun Pi, Seong M. Cho, Hee-Ok Kim
- Issue Date
- 2026-05
- Citation
- Society for Information Display (SID) International Symposium 2026, pp.1-3
- Publisher
- John Wiley & Sons, Ltd.
- Language
- English
- Type
- Conference Paper
- Abstract
- In this work, we propose a new device architecture that achieves excellent high-temperature stability by incorporating a high- thermal-capacity structure. By selectively forming a highly conductive oxide layer only at the interface between the channel material and the source/drain electrodes, the device effectively suppresses effective channel shortening while maintaining high thermal robustness. As a result, stable transistor operation is preserved even after high-temperature annealing, without the off- state degradation or routing limitations observed in previous approaches. While conventional devices fail to maintain gate control after a 300 °C annealing, the proposed structure—with a channel length as short as 1 μm—exhibits excellent switching property with a near-zero turn-on voltage after the same thermal process.
- Keyword
- Oxide semiconductor, effective channel shortening, oxygen vacancy, conductive oxide, selective formation.
- KSP Keywords
- Channel Length, Conductive oxide, Conventional devices, Effective channel, High-temperature annealing, High-temperature stability, Oxide TFTs, Oxide semiconductor, Selective formation, Source/drain electrodes, Turn-on voltage