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Conference Paper
Characteristics of Wafer-Scale Hybrid ALE of SiO2 for the Application to Gate-All-Around Channels
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- Issue Date
- 2026-05
- Citation
- European Materials Research Society (E-MRS) Meeting 2026 (Spring), pp.1-1
- Publisher
- European Materials Research Society (E-MRS)
- Language
- English
- Type
- Conference Paper
- Abstract
- The relentless scaling down of semiconductor feature size is closely intertwined with the advancement of extreme process technology such as nanometer- or atomic-scale deposition and patterning. From that point of view, controllable atomic layer etching (ALE) has emerged as one of the key extreme technologies for the fabrication of gate-all-around (GAA) channel, i.e., a gate stack of dielectric (SiO2, HfOx) and metal surrounding a nanoscale channel, of GAA- or complementary FET. The controllability of ALE is usually achieved by taking advantage of self-limiting surface reaction, a naturally diminishing chemical reaction either by decreased diffusivity or activity of reactants. In the present study, SiO2 thin films were prepared on 6-inch Si(100) wafers of three-dimensional microstructures prior to ALE. We applied optimized hybrid ALE, a combined process of the remote plasma-assisted activation of radicals and, in turn, their thermal reaction on the SiO2 surface. The hybrid ALE follows a cyclic sequence comprising (i) surface modification using trimethylaluminum (TMA), (ii) selective fluorination of the modified SiO2 surface by SF6 radicals, and (iii) subsequent removal of the fluorinated layer during the following TMA exposure. Our hybrid process is superior to conventional dry etching from the point of view of physical damage and surface roughening because direct ion bombardment, an energy transfer process between colliding particles, can be avoided or substantially reduced at least. As a result, we not only obtained the uniformity of etched thickness of more than 98% on a 6-inch wafer scale but also ascertained that the self-limiting mechanism can be exploited in the present hybrid ALE for dielectric materials. In addition, we noted that isotropic etching can be realized well even in a GAA-like structure, demonstrating the applicability of the proposed process to complicated 3D nano-device architectures. In conclusion, we demonstrated that an optimized heat-plasma hybrid ALE can be applied to nanoscale cutting-edge transistors beyond proof-of-concept, satisfying wafer-scale process stability and quality simultaneously.
- KSP Keywords
- Atomic scale, Combined Process, Cutting-edge, Dielectric materials, Energy transfer process, Feature size, Fluorinated layer, Gate stack(GS), Gate-all-around, Ion Bombardment, Limiting mechanism