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Journal Article High Performance of Ultralow Temperature Polycrystalline Silicon Thin Film Transistor on Plastic Substrate
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Authors
Dong Jin Park, Yong Hae Kim, Byung Ok Park
Issue Date
2012-05
Citation
Solid-State Electronics, v.75, pp.97-101
ISSN
0038-1101
Publisher
Elsevier
Language
English
Type
Journal Article
DOI
https://dx.doi.org/10.1016/j.sse.2012.04.028
Abstract
A high performance ultralow temperature polycrystalline silicon (poly-Si) thin film transistor (TFT) was obtained on a plastic substrate using the optimization of a triple layered buffer process for a suppression the damage on plastic substrate during laser dopant activation, the high quality SiO 2 interface layer formation between the gate dielectric film and the poly-Si film using plasma oxidation, and a successful crystallization of large grain poly-Si films with a sequential lateral solidification (SLS) method. High performances with field effect mobilities of 180 and 62 cm 2 V -1 s -1, threshold voltages of 1.4 and -1.6 V and sub-threshold swings of 0.78 and 0.92 V/decade were obtained for n-channel metal-oxide-semiconductor (nMOS) and p-channel metal-oxide-semiconductor (pMOS) TFT on plastic substrate, respectively. © 2012 Elsevier Ltd. All rights reserved.
KSP Keywords
Gate dielectric film, High performance, Large grain, Layer formation, Metal-oxide(MOX), P-Channel, Plastic substrate, Poly-Si film, Polycrystalline silicon(poly-Si), Polycrystalline silicon thin film, Sequential lateral solidification