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학술대회
A Bus Data Compression Method on a Phase-Based On-Chip Bus
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- 발행일
- 201106
- 출처
- International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) 2011, pp.149-152
- 협약과제
- 11MS1400, 클라우드DaaS 시스템 및 단말 기술 개발, 김성운
- 초록
- This paper provides a method for compression transmission of on-chip bus data. As the data traffic on on-chip buses is rapidly increasing with enlarged video resolutions, many video processor chips suffer from a lack of bus bandwidth and their IP cores have to wait for a longer time to get a bus grant. In multimedia data such as images and video,the adjacent data signals very often have little or no difference between them. Taking advantage of this point, this paper develops a simple bus data compression method to improve the chip performance and presents its hardware implementation. The method is applied to a Video Codec - 1 (VC-1)decoder chip and reduces the processing time of one macro-block by 13.6% and 10.3% for SD and HD videos, respectively
- KSP 제안 키워드
- Data compression method, Data traffic, Hardware Implementation, IP Core, Multimedia data, On-Chip Bus, Phase-based, VC-1, Video Codec, Video processor, bus bandwidth