상세정보
학술대회
Design and Implementation of 6/12MHz Switchable QAM Modulator based on DOCSIS 3.0
- 발행일
- 201109
- 출처
- International Conference on Information and Communication Technology Convergence (ICTC) 2011, pp.652-655
- 협약과제
- 11PR3600, 차세대 디지털 케이블 전송기술 개발, 최동준
- 초록
- In this paper, we present an efficient design and implementation of downstream QAM modulator for Digital CATV transmission. The Digital CATV transmission system enables the cable operators to offer high-speed multimedia service for Digital CATV subscribers in HFC network. 6/12MHz switchable QAM modulator for Digital CATV transmission is proposed and implemented in field programmable gate arrays (FPGAs). The Modulator, which can be modulate switchable bandwidth (6 or 12 MHz), consists of FEC encoder, a post-forward error correction (FEC) and a digital to analog converter (DAC). We measure the spectrum of QAM modulator output. Measured results show the maximum transmitted error vector magnitude (EVM) of 0.62% (64-QAM/6MHz), 1.05% (64-QAM/12MHz) and 0.69% (256-QAM/6MHz), 1.12% (256-QAM/12MHz). © 2011 IEEE.
- KSP 제안 키워드
- 256-QAM, 64-QAM, Digital to Analog Converter, Field Programmable Gate Arrays(FPGA), Forward error correction(FEC), HFC network, High Speed, Multimedia Service, Transmission system, design and implementation, downstream QAM modulator