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Conference Paper
전류모드 다치 논리를 이용한 비동기식 2-위상 프로토콜용 전류 가감기 및 예측기 구조 제안
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- Issue Date
- 2012-06
- Citation
- 대한전자공학회 종합 학술 대회 (하계) 2012, pp.179-182
- Publisher
- 대한전자공학회
- Language
- Korean
- Type
- Conference Paper
- Abstract
- As a scheme for on-chip interconnect, asynchronous handshake protocols, especially their implementation with current mode multiple valued logics (CMMVL), are getting more prevalent. However, since the performance of the interconnect highly depends on wire length, the speed of data transfer through relatively long wires tends to deteriorate. The structure of current steering logics to enhance the performance of an asynchronous 2-phase protocol mechanism designed with CMMVL is suggested in this paper.
- KSP Keywords
- Asynchronous handshake, Current steering, Current-mode(CM), Data transfer, On-chip interconnect, Wire length