Subjects : decision block
Type | Year | Title | Cited | Download |
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Conference | 2011 | A 4-GHz Low-power TDC-based All Digital PLL having 9.6mW and 1.2ps rms jitter Lee Ja Yol International Microwave Workshop Series on Intelligent Radio for Future Personal Terminals (IMWS-IRFPT) 2011, pp.1-2 | 1 | 원문 |
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