Subjects : Decision circuit
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Journal | 2008 | A 40 Gb/s Clock and Data Recovery Module with Improved Phase-Locked Loop Circuits 박현 ETRI Journal, v.30, no.2, pp.275-281 | 0 | 원문 |
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| Type | Year | Research Project | Primary Investigator | Download |
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