Subject

Subjects : Clock Cycle

  • Articles (6)
  • Patents (0)
  • R&D Reports (0)
논문 검색결과
Type Year Title Cited Download
Conference 2013 High-Speed J-Delayed & K-Dimensional LFSR Architecture in VLSI   Jeong Chan Bok  International Midwest Symposium on Circuits and Systems (MWSCAS) 2013, pp.433-436 0 원문
Journal 2010 Efficient Implementation of a Pseudorandom Sequence Generator for High-Speed Data Communications   Hwang Soo Yun  ETRI Journal, v.32, no.2, pp.222-229 21 원문
Conference 2009 High Speed Pattern Matching for Deep Packet Inspection   Kim Junghak  International Symposium on Communications and Information Technology (ISCIT) 2009, pp.1310-1315 6 원문
Conference 2008 An Implementation of GSG with Parallel Outputs Targeting MIMO Detector   Soo Yun Hwang  Vehicular Technology Conference (VTC) 2008 (Fall), pp.1-5 0 원문
Conference 2008 Implementation of an Efficient UE Decoder for 3G LTE System   Cho Dae Soon  International Conference on Telecommunications (ICT) 2008, pp.1-5 4 원문
Conference 2008 An Improved Implementation Method of The Gold Sequence Generator   Soo Yun Hwang  International Symposium on Consumer Electronics (ISCE) 2008, pp.1-4 8 원문
특허 검색결과
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연구보고서 검색결과
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