Subjects : FPGA-in-the-Loop
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Conference | 2021 | Design of Low-latency Synthesizable PUCCH Demodulation Unit Using Simulink HDL Coder Young-Hoon Kim International Conference on Information and Communication Technology Convergence (ICTC) 2021, pp.1387-1389 | 3 | 원문 |
| Status | Year | Patent Name | Country | Family Pat. | KIPRIS |
|---|---|---|---|---|---|
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| Type | Year | Research Project | Primary Investigator | Download |
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