Subjects : Cu seed layer
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Conference | 2002 | The effect of via size on fine pitch and high density solder bumps for wafer level packaging Ju Chull Won Electronic Components and Technology Conference (ECTC) 2002, pp.1178-1181 | 원문 |
| Status | Year | Patent Name | Country | Family Pat. | KIPRIS |
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| Type | Year | Research Project | Primary Investigator | Download |
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