Subject

Subjects : Memory address

  • Articles (5)
  • Patents (0)
  • R&D Reports (0)
논문 검색결과
Type Year Title Cited Download
Journal 2010 Application-Adaptive Reconfiguration of Memory Address Shuffler for FPGA-Embedded Instruction-Set Processor   Kwon Young-Su  Journal of Circuits, Systems and Computers, v.19, no.7, pp.1435-1447 0 원문
Journal 2010 Partial Access Conflict-Relieving Programmable Address Shuffler for Parallel Memory System in Multi-Core Processor   Kwon Young-Su  Microprocessors and Microsystems, v.34, no.1, pp.1-13 2 원문
Conference 2009 Partial Conflict-Relieving Programmable Address Shuffler for Parallel Memories in Multi-Core Processor   Kwon Young-Su  Asia and South Pacific Design Automation Conference (ASP-DAC) 2009, pp.329-334 2 원문
Conference 2008 Application-Adaptive Reconfiguration of Memory Address Shuffler for FPGA-Embedded Instruction-Set Processor   Kwon Young-Su  International Conference on Field Programmable Logic and Applications (FPL) 2008, pp.209-214 0 원문
Conference 2001 A New Stack Buffer Overflow Hacking Defense Technique with Memory Address Confirmation   Choi Yangseo  International Conference on Information Security and Cryptology (ICISC) 2001 (LNCS 2288), v.2288, pp.146-159 1
특허 검색결과
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연구보고서 검색결과
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