Subjects :
Parallel memory
논문 검색결과
| Type |
Year |
Title |
Cited |
Download |
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Conference
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2024 |
The High-performance convolution design and implementation using parallel memory processing and shift register pipeline
Youngseok Baek International Conference on Electronics, Information and Communication (ICEIC) 2024, pp.1253-1256 |
0 |
원문
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Journal
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2010 |
Application-Adaptive Reconfiguration of Memory Address Shuffler for FPGA-Embedded Instruction-Set Processor
Kwon Young-Su Journal of Circuits, Systems and Computers, v.19, no.7, pp.1435-1447 |
0 |
원문
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Journal
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2010 |
Partial Access Conflict-Relieving Programmable Address Shuffler for Parallel Memory System in Multi-Core Processor
Kwon Young-Su Microprocessors and Microsystems, v.34, no.1, pp.1-13 |
2 |
원문
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Conference
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2009 |
Partial Conflict-Relieving Programmable Address Shuffler for Parallel Memories in Multi-Core Processor
Kwon Young-Su Asia and South Pacific Design Automation Conference (ASP-DAC) 2009, pp.329-334 |
2 |
원문
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Conference
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2008 |
Application-Adaptive Reconfiguration of Memory Address Shuffler for FPGA-Embedded Instruction-Set Processor
Kwon Young-Su International Conference on Field Programmable Logic and Applications (FPL) 2008, pp.209-214 |
0 |
원문
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특허 검색결과
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Family Pat. |
KIPRIS |
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연구보고서 검색결과
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