Subjects : Multichannel application
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
| Conference | 2005 | A 1.25Gb/s Digitally-Controlled Dual-Loop Clock and Data Recovery Circuit with an Improved Effective Phase Resolution 성창경 International SoC Design Conference (ISOCC) 2005, pp.247-250 |
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| Type | Year | Research Project | Primary Investigator | Download |
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