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Detail
Registered Fabrication Method of Low Power Semiconductor Device using SOI BiCMOS
- Inventors
- Jin-Yeong Kang, Lee Seung-Yun, Cho Kyoung Ik
- Application No.
- 12068161 (2008.02.04)
- Publication No.
- 20080142843 (2008.06.19)
- Registration No.
- 7943995 (2011.05.17)
- Country
- UNITED STATES
- Project Code
- 03MB3700, Next Generation Integrated Handheld Terminal Technology, Cho Kyoung Ik
- Abstract
- Provided are an NMOS device, a PMOS device and a SiGe HBT device which are implemented on an SOI substrate and a method of fabricating the same. In manufacturing a Si-based high speed device, a SiGe HBT and a CMOS are mounted on a single SOI substrate. In particular, a source and a drain of the CMOS are formed of SiGe and metal, and thus leakage current is prevented and low power consumption is achieved. Also, heat generation in a chip is suppressed, and a wide operation range may be obtained even at a low voltage.
- KSP Keywords
- Fabrication method, Heat generation, High Speed, Leakage current, Low-Power, Operation range, Power Consumption, Power semiconductor, SOI substrate, Si-based, SiGe HBT, low power consumption, low voltage, power semiconductor devices, semiconductor device
- Family
| Status | Patent | Country | KIPRIS |
|---|---|---|---|
| Registered | NMOS DEVICE, PMOS DEVICE, AND SiGe HBT BiCMOS DEVICE FORMED ON SOI SUBSTRATE AND METHOD OF FABRICATING THE SAME | UNITED STATES |