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구분 출원국
출원년도 ~ 키워드

상세정보

등록 이중 구조 핀 전계 효과 트랜지스터 및 그 제조 방법

이중 구조 핀 전계 효과 트랜지스터 및 그 제조 방법
이미지 확대
발명자
조영균, 김종대, 노태문
출원번호
11924903 (2007.10.26)
공개번호
20080135935 (2008.06.12)
등록번호
7759737 (2010.07.20)
출원국
미국
협약과제
06MB3100, 유비쿼터스 단말용 부품 모듈, 김종대
초록
Provided are a dual structure FinFET and a method of fabricating the same. The FinFET includes: a lower device including a lower silicon layer formed on a substrate and a gate electrode vertically formed on the substrate; an upper device including an upper silicon layer formed on the lower device and the vertically formed gate electrode; and a first solid source material layer, a solid source material interlayer insulating layer, and a second solid source material layer sequentially formed between the lower silicon layer and the upper silicon layer. Therefore, the FinFET can be provided which enhances the density of integration of a circuit, suppresses thin film damages due to ion implantation using solid phase material layers, and has a stabilized characteristic by a simple and low-cost process. Also, mobility of an upper device can be improved to enhance current drivability of the upper device, isolation can be implemented through a buried oxide layer to reduce an effect due to a field oxide layer, and raised source and drain can be implemented to reduce serial resistance components of the source and drain to increase current drivability.
KSP 제안 키워드
Buried oxide, Buried oxide layer, Dual structure, Ion implantation, Low-cost, Oxide layer, Silicon layer, Solid phase, Solid source, Source and drain, current drivability, gate electrode, insulating layer, thin film(TF)