상세정보
등록 박막 트랜지스터의 제조 방법 및 박막 트랜지스터 기판
- 출원번호
- 13350037 (2012.01.13)
- 공개번호
- 20120161234 (2012.06.28)
- 등록번호
- 8378421 (2013.02.19)
- 출원국
- 미국
- 협약과제
- 08MB2900, 모바일 플렉시블 입출력 플랫폼, 조경익
- 초록
- A thin film transistor substrate. The thin film transistor substrate includes a substrate, an adhesive layer on the substrate, and a semiconductor layer having a first doped region, a second doped region and a channel region on the adhesive layer. The thin film transistor substrate further includes a first dielectric layer on the semiconductor layer, a gate electrode overlapping the channel region, a second dielectric layer on the first dielectric layer and the gate electrode, a source electrode disposed on the second insulating layer, and a drain electrode spaced apart from the source electrode on the source electrode. The channel region is disposed between the first doped region and the second doped region, and has a transmittance higher than those of the first doped region and the second doped region.
- KSP 제안 키워드
- Adhesive layer, Drain electrode, Thin-Film Transistor(TFT), dielectric layer, gate electrode, insulating layer, thin film(TF)
- 패밀리
| 구분 | 특허 | 출원국 | KIPRIS |
|---|---|---|---|
| 등록 | 박막 트랜지스터의 제조 방법 및 박막 트랜지스터 기판 | 미국 |