BROWSE
Detail
Registered VECTOR PROCESSING APPARATUS AND METHOD
- Inventors
- Chung Mookyoung, Kwon Young-Su, Kim Kyungsu, Nak Woong Eum, Park Seong Mo
- Application No.
- 12848489 (2010.08.02)
- Publication No.
- 20110107063 (2011.05.05)
- Registration No.
- 8566566 (2013.10.22)
- Country
- UNITED STATES
- Project Code
- 09MB2700, Multi-Format Multimedia SoC based on MPCore Platform, Nak Woong Eum
- Abstract
- There is provided a vector processing apparatus and method allowing for the parallel processing of a plurality of different instructions while maintaining vector processing architecture. The vector processing apparatus includes an instruction memory storing a multiple instruction group including one or more instructions; an instruction fetch unit reading the multiple instruction group from the instruction memory; and a plurality of instruction processing units each receiving the multiple instruction group through the instruction fetch unit, selecting a single instruction from the multiple instruction group according to a previous arithmetic result, and performing a arithmetic operation.
- KSP Keywords
- Arithmetic operations, Instruction fetch, Parallel Processing, Processing architecture, Single instruction, Vector processing