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Registered PHASE LOCKED LOOP CIRCUIT INCLUDING AUTOMATIC FREQUENCY CONTROL CIRCUIT AND OPERATING METHOD THEREOF

자동 주파수 제어 회로를 포함하는 위상 고정 루프 회로 및 그것의 동작 방법
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Inventors
Lee Hui Dong, Kim Kwi Dong, Seok Ju Yun, Kwon Jong-Kee, Cho Sang-Hyun
Application No.
12976449 (2010.12.22)
Publication No.
20120056654 (2012.03.08)
Registration No.
8350608 (2013.01.08)
Country
UNITED STATES
Project Code
10MB1700, Development of Analog Circuit Techniques for Mixed SoC based on 45nm CMOS Technology, Kwon Jong-Kee
Abstract
Provided is a PLL circuit including automatic frequency control circuit and an operating method thereof. The voltage controlled oscillator is primarily controlled by an automatic frequency control circuit, and is secondarily controlled by a loop filter. The voltage controlled oscillator outputs a coarsely-tuned oscillation signal when primarily controlled, and outputs a finely-tuned oscillation signal when secondarily controlled. The PLL circuit can have a quick frequency fixing time, and output the oscillation signal having a broad and stable frequency. Moreover, the noise characteristic of the PLL circuit is enhanced.