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Registered SPREAD SPECTRUM CLOCK GENERATING CIRCUIT

확산 스펙트럼 클럭 발생 회로
이미지 확대
Inventors
Seok Ju Yun, Kwon Jong-Kee, Kim Kwi Dong, Lee Hui Dong
Application No.
13275753 (2011.10.18)
Publication No.
20120105114 (2012.05.03)
Registration No.
8446194 (2013.05.21)
Country
UNITED STATES
Project Code
10MB1700, Development of Analog Circuit Techniques for Mixed SoC based on 45nm CMOS Technology, Kwon Jong-Kee
Abstract
Provided is a spread spectrum clock generating circuit. The spread spectrum clock generating circuit includes: a phase detector receiving a reference frequency signal from the external and detecting a phase difference between the reference frequency signal and a frequency-divided signal; a voltage controlled oscillator outputting an oscillation signal corresponding to a detection result of the phase detector; a main divider generating the frequency-divided signal by dividing a frequency of the oscillation signal by a main dividing ratio; and a dividing ratio controller generating a variable count value, generating a sub dividing ratio by performing delta-sigma modulation according to the count value, and adjusting the main dividing ratio according to the sub dividing ratio.