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Detail
Registered METHOD OF MANUFACTURING VIA ELECTRODE
- Inventors
- Kim Dong -Pyo, Park Kun Sik, Baek Kyu-Ha, Kim Zin-Sig, Kim Joo Yeon, Jeong Ye Sul, Park Ji Man, Do Lee-Mi
- Application No.
- 13267215 (2011.10.06)
- Publication No.
- 20120086132 (2012.04.12)
- Registration No.
- 8404588 (2013.03.26)
- Country
- UNITED STATES
- Abstract
- Provided is a method of manufacturing a via electrode by which productivity and production yield can be augmented or maximized. The method of the present invention includes: forming a via hole at a substrate; forming a catalyst layer at a sidewall and a bottom of the via hole; and forming a graphene layer in the via hole by exposing the catalyst layer to a solution mixed with graphene particles.
- Family
| Status | Patent | Country | KIPRIS |
|---|---|---|---|
| Registered | 비어 전극의 제조방법 | KOREA | KIPRIS |