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Registered FRACTIONAL DIGITAL PLL WITH ANALOG PHASE ERROR COMPENSATOR

아날로그 위상에러 보상기를 장착한 프랙셔널 디지털 위상고정루프
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Inventors
Lee Ja Yol, Yu Hyun Kyu, Kim Seongdo
Application No.
13310581 (2011.12.02)
Publication No.
20120161832 (2012.06.28)
Registration No.
8432199 (2013.04.30)
Country
UNITED STATES
Project Code
10MB2800, Development of Advanced Digital RF Technology for Next Generation Wireless Convergence Terminals, Yu Hyun Kyu
Abstract
Disclosed is a fractional digital phase locked loop with an analog phase error compensator. The digital phase locked loop with an analog phase error compensator can reduce excessive power consumption and power noise and transient current noise while increasing phase error detection resolution by performing fractional phase error detection and compensation through the analog phase error compensator.
KSP Keywords
Digital PLL, Error compensator, Error detection, Power Consumption, Power noise, Transient currents, current noise, digital phase locked loop(DPLL), phase error, phase locked, phase-locked loop(PLL)