12VB1500, Energy Efficient Power Semiconductor Technology for Next Generation Data Center,
Eun Soo Nam
Abstract
본 발명은 반도체 기판의 제조방법을 개시한다. 그의 방법은, 기판의 가장자리를 둘러싸는 차단 패턴을 형성하는 단계와, 상기 차단 패턴을 제외한 상기 기판의 전면에 이완 층을 형성하는 단계와, 상기 이완 층 및 상기 차단 패턴 상에 에피 반도체 층을 형성하는 단계를 포함한다. 여기서, 상기 에피 반도체 층은 상기 차단 패턴 상에서부터 성장되지 않고, 상기 이완 층의 측벽 및 상부에 등방적으로 성장되는 선택적 등방성 성장방법에 의해 상기 차단 패턴을 점진적으로 덮을 수 있다.
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J. Kim et. al, "Trends in Lightweight Kernel for Many core Based High-Performance Computing", Electronics and Telecommunications Trends. Vol. 32, No. 4, 2017, KOGL Type 4: Source Indication + Commercial Use Prohibition + Change Prohibition
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