BROWSE
Detail
Registered BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 5/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
이미지 확대
BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 5/15 AND 64-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
- Inventors
- Sung Ik Park, Kwon Sun Hyoung, Lee Jae-Young, Heung Mook Kim, Namho Hur
- Application No.
- 14625550 (2015.02.18)
- Publication No.
- 20150236720 (2015.08.20)
- Registration No.
- 9602135 (2017.03.21)
- Country
- UNITED STATES
- Project Code
- 13PR3900, Developement of Terrestrial Broadcasting Technology for Next Generation DTV, Heung Mook Kim
- Abstract
- A bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
- KSP Keywords
- Bit interleaving, Interleaving Method, Low Density Parity Check(LDPC), Symbol mapping, code rate, low density, parallel factor, parity check
- Family