Registered
Interleaver for next generation broadcasting system
- Inventors
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Sung Ik Park, Kwon Sun Hyoung, Lee Jae-Young, Heung Mook Kim, Namho Hur
- Application No.
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16202519 (2018.11.28)
- Publication No.
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20190097660 (2019.03.28)
- Registration No.
- 10623023 (2020.04.14)
- Country
- UNITED STATES
- Project Code
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13PR3900, Developement of Terrestrial Broadcasting Technology for Next Generation DTV,
Heung Mook Kim
- Abstract
- A bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 5/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 64-symbol mapping.
- Family
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