Registered
BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 3/15 AND QUADRATURE PHASE SHIFT KEYING, AND BIT INTERLEAVING METHOD USING SAME
- Inventors
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Sung Ik Park, Lee Jae-Young, Kwon Sun Hyoung, Heung Mook Kim, Namho Hur
- Application No.
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14606958 (2015.01.27)
- Publication No.
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20160211945 (2016.07.21)
- Registration No.
- 9553696 (2017.01.24)
- Country
- UNITED STATES
- Project Code
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14MR9100, Development of Service and Transmission Technology for Convergent Realistic Broadcast,
Namho Hur
- Abstract
- A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
- KSP Keywords
- Bit interleaving, Coded Modulation, Interleaving Method, Low Density Parity Check(LDPC), Phase shift, Quadrature Phase, bit-interleaved coded modulation(BICM), code rate, low density, parallel factor, parity check, phase shift keying, quadrature phase shift keying(QPSK)
- Family
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