Registered
BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 2/15 AND 16-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME
- Inventors
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Sung Ik Park, Kwon Sun Hyoung, Lee Jae-Young, Heung Mook Kim, Namho Hur
- Application No.
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14626169 (2015.02.19)
- Publication No.
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20160241260 (2016.08.18)
- Registration No.
- 9577674 (2017.02.21)
- Country
- UNITED STATES
- Project Code
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14MR9100, Development of Service and Transmission Technology for Convergent Realistic Broadcast,
Namho Hur
- Abstract
- A bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
- KSP Keywords
- Bit interleaving, Interleaving Method, Low Density Parity Check(LDPC), Symbol mapping, code rate, low density, parallel factor, parity check
- Family
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