Registered
PROCESSING ELEMENT AND OPERATING METHOD THEREOF IN NEURAL NETWORK
- Inventors
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Yong Cheol Peter Cho, Kwon Young-Su
- Application No.
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16206687 (2018.11.30)
- Publication No.
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20190244084 (2019.08.08)
- Registration No.
- 11494623 (2022.11.08)
- Country
- UNITED STATES
- Project Code
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17HB2500, Intelligence Many-Core Processor and SW based on Low-Power Hypervisor,
Kwon Young-Su
- Abstract
- The processing element may include a first multiplexer selecting one of a first value stored in a first memory and a second value stored in a second memory, a second multiplexer selecting one of a first data input signal and an output value of the first multiplexer, a third multiplexer selecting one of the output value of the first multiplexer and a second data input signal, a multiplier multiplying an output value of the second multiplexer by an output value of the third multiplexer, a fourth multiplexer for selecting one of the output value of the second multiplexer and an output value of the multiplier, and a third memory storing an output value of the fourth multiplexer.
- KSP Keywords
- Processing Element, input signal, neural network(NN)
- Family
-