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Registered SEMICONDUCTOR DEVICE INCLUDING CMOS CIRCUIT AND OPERATION METHOD THEREOF
- Inventors
- Kang Tae Wook, Jae-Jin Lee, Oh Kwang Il, Kim Sung Eun, Sukho Lee, Han Kyuseung
- Application No.
- 16262738 (2019.01.30)
- Publication No.
- 20190245532 (2019.08.08)
- Registration No.
- 10491208 (2019.11.26)
- Country
- UNITED STATES
- Project Code
- 18ZB1200, Development of Core Technologies for Implantable Active Devices, Lee Jeong Ik
- Abstract
- The inventive concept relates to a semiconductor device including a CMOS circuit and an operation method thereof. A semiconductor device according to an embodiment of the inventive concept includes a semiconductor circuit, a controller, and a voltage generator. The semiconductor circuit operates at a drive voltage to reduce the delay time between input and output as the temperature increases. The controller determines the malfunction of the CMOS circuit based on the difference between the source-drain current of the PMOS transistor and the source-drain current of the NMOS transistor as the temperature changes. The voltage generator generates or adjusts a body-bias voltage applied to the PMOS transistor or the NMOS transistor based on a malfunction determination of the controller. According to the inventive concept, malfunctions and performance deterioration occurring in a CMOS circuit operating at a low voltage may be reduced.
- KSP Keywords
- AND operation, Bias voltage, CMOS circuits, Delay Time, Drain current, Input-Output, Low voltage, NMOS transistor, Operation method, PMOS transistor, Source-drain current, Temperature change, body-bias, inventive concept, performance deterioration, semiconductor device, voltage generator
- Family
| Status | Patent | Country | KIPRIS |
|---|---|---|---|
| Registered | CMOS 회로를 포함하는 반도체 장치 및 이의 동작 방법 | KOREA | KIPRIS |