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Registered ELECTRONIC CIRCUIT FOR ADJUSTING PHASE OF CLOCK

비정상 클럭 데이터 위상 검출 회로 및 이를 이용한 인체통신 수신 장치
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Inventors
Oh Kwang Il, Byun Kyung Jin, Kim Hyuk, Park Hyung-Il, Jae-Jin Lee, Kang Tae Wook, Mi Jeong Park, Lim In Gi, Kim Sung Eun
Application No.
16542469 (2019.08.16)
Publication No.
20200067516 (2020.02.27)
Registration No.
10644710 (2020.05.05)
Country
UNITED STATES
Project Code
18ZB1200, Development of Core Technologies for Implantable Active Devices, Lee Jeong Ik
Abstract
The inventive concept includes an oscillating circuit, a phase inverting circuit, and a phase detecting circuit. The oscillating circuit generates a first clock to be used to sample an input signal. The phase inverting circuit outputs a second clock based on the first clock. The phase detecting circuit generates a control signal having a first logic value when a phase difference between a phase of the input signal and a phase of the second clock is less than a reference value for a reference time or more. The phase detecting circuit generates the control signal having a second logic value when the phase difference is equal to or greater than the reference value or when the phase difference is less than the reference value for a time shorter than the reference time. The phase inverting circuit inverts the phase of the second clock when a logic value of the control signal changes from the first logic value to the second logic value or when a logic value of the control signal changes from the second logic value to the first logic value.
KSP Keywords
Control Signal, Electronic circuit, Input signal, Oscillating circuit, Phase Difference, Reference value, inventive concept
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Status Patent Country KIPRIS
Registered ELECTRONIC CIRCUIT FOR ADJUSTING PHASE OF CLOCK KOREA KIPRIS