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Cmos Technology Gain Control Current Consumption Phase Shifter Phase Error Power Supply Cmos Process Flip-Flop Conversion Gain Frequency-Modulated Continuous Wave(FMCW) Pass-Band Two-Dimensional(2D) Single Chip Control Range Dual-Modulus Prescaler Gain Range Receiver Module 800 Mhz Three Dimensional(3D) 10 Ghz Small Area Ghz Band Power Gain Phased Array Ict Convergence Continuous Wave Radar High Gain On-Chip Real-Time Application CMOS LNA Direct Conversion Receiver Digital-To-Analog(DAC) Frame Buffer Low Spurious 40 Nm Rf Isolation Semiconductor Technology Input Power Portable System 2-D Array Single Phase Test Chip Wideband Receiver Wideband Lna Noise Figure(NF) N-Path Filter Two-Phase Rf Filtering Array Size Band Pass Filter(BPF) Coupling Effects Charge Pump Common-Mode Noise Dc Offset Voltage Filtering Characteristics High-Speed Operation IMT-2000 Linear Phase Monopulse Radar Risc Core Phase Control Phase Resolution Quadrature Vco Quantization Error Virtual Page 250 Mhz X-Band Wi-Fi Rf Channel Real-Time Operation Average Power Carrier Frequency D/A Converter Electromagnetic Coupling Embedded Memory Integrated Circuit Low Voltage Operation Low Supply Voltage Array Structure Coupling Reduction Control Method Frequency-Tunable Fabrication Technology High Q Last Stage Logic Cmos Low Power Consumption Minimum Gain Multimedia Systems Metal Layer Reduction Effect Phase Accumulator(PA) Phase Frequency Detector Verilog Rtl Sub-Harmonic Mixer Spurious-Free Dynamic Range(SFDR) Stable Operation 7 Mm Radar System Radar Signal Processing Beam Steering Current Feedback Channel Selection Chip Area Cmos Switches Equivalent Resistance Low-Power Operation Low Noise Amplifier(LNA) Logic Synthesis Long-Range Low Current Multi-Band Maximum Operating Frequency Pre-Distortion Physical Separation Vector Sum Spurious Tones Out-Of-Band Iip3 Array Receivers Baseband Circuits Current-Mode(CM) Dc Current Dual-Band High Linearity Linear Control Noise Frequency Reverse Isolation Rendering Engine Rms Current Single Channel Reference Spur Processor Array Xilinx Fpga Rf Receiver Analog Baseband Core Area Capacitor Load Channel Noise Dedicated Network Direct Digital Frequency Synthesizer(DDFS) Digital Signal Processing Fixed Point Operation In-Band Phase Noise Receiver Front-End Pump Current Variable Gain 2 Mm Sine Wave Radio Frequency (Rf) Controlled Resistor Drawing Speed Frequency Band Hardware Implementation Inductive Peaking Loop-Filter(LF) Low Power Dissipation Memory Bandwidth Core Circuit 0.18um Cmos 2.4 Ghz 3 V Second-Order Sine Function