BROWSE
Researchers
Detail
Choi Jaewoong
- Department
- PIM AI SoC Research Section
- Contact
- KSP Keywords
| Type | Year | Title | Cited | Download |
|---|---|---|---|---|
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Conference
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2024 | A Low-Power HBM3 Memory Interface 김이경 대한전자공학회 학술 대회 (하계) 2024, pp.3378-3379 | ||
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Conference
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2023 | DQ and DQS Receiver for HBM3 Memory Interface with DFE Offset Calibration Sujin Park International SoC Design Conference (ISOCC) 2023, pp.215-216 | 0 | |
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Conference
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2023 | Chiplet Heterogeneous-Integration AI Processor Youngsu Kwon International Conference on Electronics, Information and Communication (ICEIC) 2023, pp.1-2 | 3 | |
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Conference
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2022 | 8Gbps Data Receiver Design based on DFE for HBM3 Memory Interface 전영득 반도체공학회 학술 대회 (하계) 2022, pp.88-88 | ||
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Conference
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2022 | Design of high-speed memory data driving circuit with pre-emphasis function by using of output impedance control 조민형 대한전자공학회 학술 대회 (하계) 2022, pp.505-506 | ||
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Conference
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2022 | Low Power All Digital Delay Locked Loop Circuit for Clock Delay Control Scheme per de-Skew Group of a HBM3 Memory Interface PHY 김이경 대한전자공학회 학술 대회 (하계) 2022, pp.525-526 |