ETRI-Knowledge Sharing Plaform

Wireless Communication Control Method High Speed Baseband Signal Baseband Modem Efficient Architecture Direct-Sequence Code-Division Multiple-Access(DS-CDMA) Application Layer Energy Loss High-Throughput Architecture Multimedia Applications Wishbone Bus Network Interface Cyclic Shift Galois/Counter Mode High-Dimensional Hdl Coder Long Term Evolution(LTE) Motion Compensation(MoCo) Vector Compression Vector Similarity Single Instruction Multiple Data(SIMD) Prototype System Software Library Base Station(BS) Cost-Effective Computation Complexity Data Blocks Fast Data Transfer Network Architecture Wider Bandwidth Sequence Generator Hardware Description Language(HDL) Inverse Quantization Narrowband Internet Of Things(NB-IoT) On-Chip Network Parallel Processor Physical Uplink Control Channel Verilog Hdl Similarity Measure Signal Generation Code Reuse Hierarchical Structure Performance Evaluation Phase Compensation Reverse Channel Simd Processors Singular Value Decomposition(SVD) Support Vectormachine(SVM) Soc Architecture Transfer Line 60 Ghz Communication Network Communication Link Detection Method Flow Control Low Latency Multimedia Data Processing Modular Architecture Wideband Operation Reconfigurable Processor Small Size Area-Efficient Blocking Effect Design Criteria High-Bandwidth Inverse Transform Image Stitching New Object Detection User Equipment(UE) Multiple Component Carriers Compression Method Computational Complexity Center Frequency Fpga-In-The-Loop Hardware Implementation Multiple Users Radial Basis Function USB 3.0 Transfer Length