ETRI-Knowledge Sharing Plaform

Ge-On-Si Illumination Type High Responsivity Sige Hbt Type 1 Data Rate 3-Db Bandwidth Si Photodetector 50 GB Bulk Silicon 1550 Nm Data Transmission Bit Error Rate(And BER) Optical Network Applications Cost-Effective Down-Conversion Mixer Reduced Pressure Chemical Vapor Deposition P-I-N Photodetectors 5.8 Ghz Low Dark Current Sige Film Phase Shifter Ge Photodetectors Photonic Devices Performance Levels Petri Net(PN) TO-CAN 6 Ghz High Sensitivity Optical Interconnect(OI) Threading Dislocations(TDs) 1/F Noise Optical Data Nano-Device Fabrication Process Field-Effect Transistors(FETs) Zno Thin Films Chemical Mechanical Polishing(CMP) Differential Drive Reset Current Silicon Photonics Technology Sige Alloy Experimental Result High Temperature Silicon Wafer Strained-Si Memory Device Silicon Substrate Structure-Related Sige Bicmos Technology Dual-Channel Extinction Ratio Optical Transmission Spiral Inductor Silicon-Germanium(SiGe) Wide Range P-Zno 2.4 Ghz Bulk Cmos Low-Cost 40 Gb/S Waveguide Photodetector Zno Films Parasitic Capacitance Base Structure Bottom Electrode Cmos Compatible Process Concurrent Dual-Band Dry Etching Deposition Technique Electrical Properties(I-V curve) Input Power Ict Convergence In-Situ Annealing Key Parameters Memory Interface N-Type Transistors Novel Method Negative Differential Resistance(NDR) Oxidation Of Silicon Prostate-Specific Antigen(PSA) P-N Junction Phase Change Material(PCM) Practical Implementation Pattern Analysis Process Conditions Resonance Frequency Rf Isolation Reconfigurable Fet Switching Speed Semiconductor Technology Selective Epitaxial Growth(SEG) Threading Dislocation Density Time Effect Cross-Sectional Imaging Fowler-Nordheim (F-N) Stress Annealing Temperature Crystal Plane Current-Voltage Carrier Confinement Creative Technology Driver Circuit Data Center Energy Efficiency Electronic Chips Electronic-Photonic Integration Epitaxial Lateral Overgrowth Electrical Resistivity III-V High-Quality I/O Devices Insulator Material Initialization Vector(IV) Low Concentration Mach-Zehnder (Mz) Modulator Medium Power Amplifier Novel Technique Non-Volatile Memory(NVM) Noise Performance Oxide Trap Density Operational Voltage P-Doped Quality-Factor(Q-factor) Radio Link Rf-Magnetron Sputter Deposition Reverse Leakage Current Sige Epitaxial Growth Structure Optimization Surface Immobilization Soi Process Up-Conversion Mixer Au Nanoparticles(Au-NPs) Low Power Leakage Photonic Interconnects Network Communication Eye Diagram Annealing Process Doped Poly-Si Electrical Contact Etching Process Hybrid Memory Cube Higher Frequency Hole Concentration Insertion Loss Integration Scheme Quantum Well(QW) Metal-Insulator Transition Oxidation Process Silicon Photonic Integrated Circuits Soi Wafer Silicon Waveguide Situ Doping Signal-To-Noise Thermal Variation Thermal Stability(TGA) Tensile Strain Polished Si 65 Nm Buffer Layer Communication Applications Cut-Off Frequency Crystalline State Carrier Density External Quantum Efficiency Enhanced Performance Force Microscopy High Speed Network Heating Layers LOW POWER AND HIGH SPEED Model-Based Nonreturn-To-Zero(NRZ) Surface Potential Si Wafer Silicon-Based Thin Films Si Channel Surface Roughness Analysis Top-Down Ultra-Thin Body(UTB) Ultra-High Vacuum Chemical Vapor Deposition 1310 Nm X-Ray Diffraction Analysis Quantum Channel Building Block Cmos Driver Coupled Waveguide Current Consumption Complementary Metal-Oxide-Semiconductor(CMOS) High Throughput(HTP) High Speed Communication High Resistivity Ion Implantation Light Sources Monolithically Integrated Limiting Factors New Method Optical Transceiver Operating Speed Phase Transition Photonic Transceiver Rf Performance Sound Performance Silicon Epitaxial Layer System-On-Chip(SoC) Transit Time Wire-Bonded 100 Gb/S 7 Mm Conversion Gain Single Wafer Avalanche Photodetector Applied Bias Atomic Force Microscope(AFM) Compact Model Chalcogenide Alloys Doped Silicon Density Change Fermi Level Hybrid Electronics Inp Hbt Highly Doped Maximum Oscillation Frequency Optical Communications Potential Applications On-Board Equipment Power Amplifiers(PAs) P-Type Zno Performance Tradeoffs Process Technology P-N Heterojunction Photonic Transmitter Photonic Integrated Circuits (Pics) Sige Source Single Channel Si-Cap Surface Analysis Silicon Electronics Travelling Wave Amorphous Sio 2 Data Communication Optimized Process Receiver Front-End Off-Chip Build-Up Time Diffraction Pattern Front-End Circuit High-Performance Computer(HPC) Highly Crystalline Key Role Low Voltage Low Phase Noise Photonic Circuits Potential Barrier 850 Nm Window Size 3.5 Ghz Fowler-Nordheim Stress Avalanche Breakdown Voltage And Logic Gates Cmos Front-End Cmos Receiver Control Device Cycling Endurance Data Computing Joule Heating Fully Integrated Germanium Photodetector High-Resolution X-Ray Diffraction Interface Circuit Low Noise Localized Oxidation Layer Growth Local Area Modulation Efficiency Minimum Noise Figure Material Characteristics Misfit Dislocation Module Performance Optical Propagation Loss Optical Power On-Chip Measurement Optical Alignment Polycrystalline Silicon(poly-Si) Pulse Width Power Demand Rf Transmitter Relaxed Sige Small-Sized Single-Chip Second Metal Sige Bicmos Process Sige Virtual Substrates Strain Relief Supply Voltage Si Substrate Specific Binding Silicon-On-Insulator (Soi) Technology 2.3 Ghz Wavelength Range Sige Device