ETRI-Knowledge Sharing Plaform

H.264 Decoder Virtual Platform Multimedia Applications Artificial Intelligence Convolution Neural Network(CNN) Neuromorphic Hardware Mobile Application(APP) External Memory Face Recognition Systems Xilinx Virtex Thin Structure Compression Method Fpga Implementation Memristor Device H.264 Video Decoder Hardware And Software Face Detection Network Model Buffer Size High Performance Ultra-Thin Real-Time Application Object Recognition Research Institute Recognition Function Data Traffic Design Methodology Data Compression Eye Detection Graphics Processing Hardware Architecture High Density Integration Illumination Invariant Low-Power Mixed-Mode Memory Controller Data Transfer Number Of Layers Vlsi Implementation System Throughput Next-Generation Fast Simulation Graphic Processing Unit(GPU) Haar-Like Features Motion Estimation(ME) Multi-Channel Need For Resource Utilization Hardware Model Heterogeneous Feature Internet Of Thing(IoT) South Korea State-Of-The-Art Weight Value Simulation Time New Materials On-Chip Network Binary Weight Cmos Technology Compression Efficiency Design Exploration Discrete Cosine Transform Fabrication Technology Generalized Structure Hardware Complexity Integrity Verification Large Memory Self-Quotient Image Power-Efficient Parallel Computing Visual Recognition Network On Chip(NoC) On-Chip Bus Analyzing Data Cascaded Classifier Compression Algorithm Computer Systems Deep Neural Network(DNN) Design And Implementation Dedicated Hardware Experimental Result Feature Extraction Linear Discriminant Analysis(LDA) Logic Gate Mesh Topology Matrix Multiplication Silicon Process Large-Scale Performance Analysis Von Neumann Ultra-High Density Xilinx Vivado 2015 Shared Memory Software Architecture Computing Performance Deep Convolutional Neural Networks Development Environment Design Environment Fully-Connected Hardware System Golomb-Rice Coding Illumination Effect Parallel Operations Video Codec Noc Architecture Application Software Operating System Operation Method Computer Vision(CV) Delay Time High Reliability Human Brain Level Design Mesh Noc Mobile Multimedia Reference Model Lossless Compression Parallel Performance Vision Application Single Chip System-On-A-Chip Outer Product Amba Bus Caffe Framework Computer Architecture Efficient Operation Floating-Point Numbers Floating Point Unit Hardware Design Hw-Sw Codesign High Speed Hardware Implementation Mnist Dataset Mobile Video Mpeg-4 Video Memory Bandwidth Recognition Performance Parallel Processing Variable Length Coding Verification Module Transaction Level Model