ETRI-Knowledge Sharing Plaform

Core/Shell Nanowires Ge/Si Core/Shell Directional Coupler(DC) Schottky Junction Spot Size Fabrication Process High Responsivity Integrated Circuit Reduced Pressure Chemical Vapor Deposition P-I-N Photodetectors Schottky Diode Slab Waveguide Silicon Wafer Low Dark Current 3-Db Bandwidth Strain Gradient Thin Film Resistor Ge Photodetectors High Speed Creative Technology Annealing Temperature 2d Material Single Nanowire Leaky Mode Annealing Conditions Annealing Time Anti-Stiction Coating Base Structure Beam Profile Cross-Sectional Imaging Contact Size Deposition Technique Doped Si Electrical Properties(I-V curve) Effective Power Focal Length Hole Carriers Key Parameters Oxidation Of Silicon N-Type Transistors Photoelectric Characteristics Photonic Devices Pattern Analysis Process Conditions Reconfigurable Fet Si Nanowires Selective Epitaxial Growth(SEG) Time Effect Transmission Electron Microscopy(TEM) Vls Process Broadband Photodetector Carrier Confinement Crystal Plane High-Quality Internal Photoemission Low Power Leakage Minimum Gap Noise Performance Novel Technique Non-Volatile Memory(NVM) P-Type Silicon Separation Process Soi Process Ultra-High Performance Waveguide Grating Coupler Wake-Up W Metal Epitaxial Lateral Overgrowth Junction Formation 6 Ghz 2d Semiconductors Numerical Aperture Absorption Edge Coupled Beam Emitter Layer Even Longer Wavelength Electron Microscopy Analysis Field-Effect Transistors(FETs) Highly Efficient Metal Deposition Power Semiconductor Room-Temperature Rectifying Behavior Remnant Polarization Scanning Electron Microscopy(S.E.M.) Silicate Glasses Thermal Variation Technology Forecasting Tensile Strain Top Electrode 5 Nm Eye Diagram Laser Light Cut-Off Frequency Carrier Density Chemical Mechanical Polishing(CMP) Crystalline State Forward And Reverse Electronic Structures Glass Materials Hydrogen Silsesquioxane Infrared Detector Intelligent Greenhouse Memory Applications Model-Based Process Parameters Resistance Change Silicon-Based Surface Potential Sulfurization Method Surface Roughness Analysis Type-Ii Heterojunction X-Ray Diffraction Analysis Ultra-Thin Body(UTB) Ultra-High Vacuum Chemical Vapor Deposition Building Block Base Layer Energy Band Structure Gaussian Functions High Throughput(HTP) Ic Reliability Light Sources Limiting Factors Mid-Infrared(MIR) Operating Speed Prism Coupling Method Parameter Values Rf Performance Si Layer Sound Performance Semiconductor Heterojunction Superior Performance Silicon Epitaxial Layer System-On-Chip(SoC) Techno-Economic Study Transit Time Transition-Metal Dichalcogenides(TMDCs) Amorphous Sio 2 Applied Bias Blue Laser Beam Propagation Method Compact Model Device Size Density Change Electron Beam Lithography Heterojunction Barrier Heterojunction Bipolar Transistors(HBTs) Hybrid Electronics Initial State Maximum Oscillation Frequency N-Type Si Performance Tradeoffs Polarization Switching Reverse Bias Schottky Photodiode Single Wafer Silicon Electronics Charge Transport Build-Up Time Bulk Silicon Active Devices Density Functional Theory(DFT) Diffraction Pattern Electrical Characteristics Full Width Intensity Profile Highly Crystalline Low Phase Noise Output Coupling Optimal Conditions Potential Barrier Resistance Variation Silicon-Germanium(SiGe) Sige Hbt Silicon Device Transport Model Window Size Wide Range Heavily Doped Optimized Process 2.3 Ghz And Logic Gates Current-Voltage Characteristics Data Transmission Diffraction Limit Group Iv Ge-On-Si High Resistance High-Resolution X-Ray Diffraction Hexagonal Boron Nitride(h-BN) Lithography Process Local Area Low Noise Low-Cost Localized Oxidation Minimum Noise Figure On-Chip Measurement Optical Devices Pulse Width Power Demand Silicon-On-Insulator (Soi) Technology Van Der Waals (Vdw) Heterostructures Waveguide Photodetector 3.5 Ghz 1550 Nm