ETRI-Knowledge Sharing Plaform

Data Reuse Neural Processor Acceleration Performance Graphic Processing Unit(GPU) High Performance 28 Nm Artificial Intelligence Applications Deep Neural Network(DNN) Network Accelerator Power Efficiency Superior Performance Development Environment Development Time High Degree Intellectual Property(IP) Memory Architecture Operating Scheme Programmable Control Safety Standard Software Implementation Voltage Scaling Wide Range Memory-Efficient Efficient Architecture High Speed High Frequency(HF) Power Management Silicon Area Single-Chip Systolic Array Voice Recognition Electronic Systems Low-Power Object Recognition On-Chip Memory Power Consumption Power Saving Floating-Point Data Execution Time Electronic Control Unit(ECU) Image Recognition Mesh Structure Max-Pooling Processor Architecture User-Friendly Coupled With Deep Learning(DL) General-Purpose Graphics Processing Unit(GPGPU) In-Memory In-Vehicle Optimization Algorithm Power Limit Power Model Road Vehicle State-Of-The-Art Vehicle Safety Automated Optimization Dynamic Voltage And Frequency Scaling Dynamic Frequency Scaling Higher Performance Large Memory Memory Structure Quad-Core Small Footprint Soc System Area Constraints Design Verification Iso 26262 Matrix Multiplication Mobile Application(APP) Neural Network Applications Operating Frequency Run Time Real-Time Execution Safety Requirements Control Scheme Estimated Performance Multi-Dimensional Neural Processing Power Behavior Process Technology Autonomous Driving Vehicle Adaptive Power Functional Safety Fpga Board Flexible Memory