ETRI-Knowledge Sharing Plaform

Neural Processor Data Reuse High Performance Artificial Intelligence Applications Deep Neural Network(DNN) Network Accelerator Power Efficiency Superior Performance 28 Nm Development Environment Development Time High Degree Intellectual Property(IP) Graphic Processing Unit(GPU) Acceleration Performance Memory Architecture Electronic Systems Low-Power On-Chip Memory Power Saving Power Consumption Object Recognition Electronic Control Unit(ECU) Execution Time Floating-Point Data Image Recognition Mesh Structure Max-Pooling Processor Architecture User-Friendly Coupled With Deep Learning(DL) General-Purpose Graphics Processing Unit(GPGPU) In-Memory In-Vehicle Optimization Algorithm Power Limit Power Model Road Vehicle State-Of-The-Art Vehicle Safety Automated Optimization Dynamic Voltage And Frequency Scaling Dynamic Frequency Scaling Higher Performance Large Memory Memory Structure Quad-Core Soc System Small Footprint Area Constraints Design Verification Iso 26262 Mobile Application(APP) Matrix Multiplication Neural Network Applications Operating Frequency Run Time Real-Time Execution Safety Requirements Control Scheme Estimated Performance Multi-Dimensional Neural Processing Process Technology Power Behavior Autonomous Driving Vehicle Adaptive Power Flexible Memory Functional Safety Fpga Board Operating Scheme Programmable Control Safety Standard Software Implementation Voltage Scaling Wide Range Efficient Architecture High Speed High Frequency(HF) Memory-Efficient Power Management Single-Chip Silicon Area Voice Recognition Systolic Array