ETRI-Knowledge Sharing Plaform

Neural Network(NN) Single Chip Low Power Consumption Cmos Process Digital Multimedia Broadcasting 28 Nm Large-Scale Power Efficiency Cmos Technology Neural Processor Standard Cell Library Fault Tolerance High Performance Processor Architecture Multimedia Decoding H.264 Video Decoder Image Recognition Real-Time Execution MPEG-4 AVC Higher Performance Grid Networks Critical Factors Memory Management Ip-Based Architecture Design Data Transfer Micro-Processor Transformer-Based Heterogeneous Integration Fixed Point Design Aspects Autonomous Driving Vehicle In-Memory Memory Architecture Max-Pooling Intellectual Property(IP) Integration Architecture High Speed Signaling Deep Learning(DL) Data Reuse Computing Resources Silicon Area Systolic Array Mesh Structure Voice Recognition Electronics System Self-Recovering Estimated Performance Fast Computation 2.5d Interposers Thermal Stability Safe Design Redistribution Layer Audio Data Small Footprint Area Constraints Graphics Processing Units(GPUs) Power Saving Sampling Frequency High-Quality Power Dissipation Neural Computing Small Form Factor Safety Requirements Development Time Efficient Implementation Fault Performance Coupled With Data Explosion Fpga Board Energy Crisis High Bandwidth Memory(HBM) Total Power Consumption State-Of-The-Art Fpga/Asic Implementation Network Description Modified Discrete Cosine Transform(MDCT) Autonomous Vehicle Large Area Energy Efficiency Artificial Intelligence Applications Silicon Wafer Clock Frequency Analog-To-Digital Converters(ADCs) Data Processing Power Gating Software Implementation Neural Processing Quad-Core Multi-Dimensional Temperature Profile Edge Devices Audio And Video Data Broadcasting Functional Safety High Degree General-Purpose Graphics Processing Unit(GPGPU) Mobile Application(APP) Object Recognition A/V Synchronization Application Areas MPEG-2 TS Network Accelerator Electronic System On-Chip Memory Floating-Point Data Multimedia Applications Broadcasting Services Next-Generation Power Distribution Network Software Development Environment Eureka-147 Intelligence Algorithm Physical Limitation Memory Bandwidth Video Processing Sampling Time(Ts) Baseband Chip Pipelined Adc Computing Performance Energy-Efficient Lower Cost System-On-Chip(SoC) Vehicle Safety Signal Integrity(SI) Autonomous Car Acceleration Performance Process Technology Safety Standard Frequency Detection Wireless Multimedia Superior Performance Soc System Adaptive Power Error Recovery National Standard Road Vehicle User-Friendly Cooling Structure Digital Audio Broadcasting Design And Analysis Iso 26262 Baseband Processor External Memory Electronic Control Units(ECUS) Hardware Interface Security System Supply Voltage Design Verification High Throughput Low-If Channel Design Operating Frequency Efficient Cooling In-Vehicle Lip Sync Transport Stream(TS)